Hardware Implementation of Newton-Raphson Method for Nonlinear Stress Estimation

Abstract

This research aims to develop and implement digital design for computing the uniaxial Cauchy stress of an internally balanced hyperelastic material using the Newton-Raphson (NR) iterative algorithm at a hardware level, such as Field Programmable Gate Array (FPGA) technology. FPGA technologies are semiconductor devices which provide a parallel processing technique essential for real-time systems when computational speed is critical. The NR algorithm is investigated based on FPGA to solve the internally balanced equation, which is developed at a high level of abstraction and then implemented using physical instruments to obtain actual data. The NR algorithm is programmed using VHDL language. Then, the design is simulated by ModelSim Intel program. The achieved results using hardware approach are compared with a MATLAB script to verify the functionality of the digital design. The digital system is fully implemented on the Cyclone V FPGA device using the Quartus Intel program. The accuracy and precision of the results obtained at the hardware level are acceptable, within the given threshold, depending on the data type representing the fractional number used for the computation, as well as the resources available, which depend on the FPGA technology used.